Xilinx Virtex-4 User Manual page 24

Fpga embedded tri-mode ethernet mac
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Chapter 2: Ethernet MAC Architecture
Table 2-2: Receive Client Interface Signals (Cont'd)
Signal
EMAC#CLIENTRXDVLDMSW
EMAC#CLIENTRXGOODFRAME
EMAC#CLIENTRXBADFRAME
EMAC#CLIENTRXSTATS[6:0]
EMAC#CLIENTRXSTATSBYTEVLD
EMAC#CLIENTRXSTATSVLD
EMAC#CLIENTRXCLIENTCLKOUT
EMAC#CLIENTRXDVREG6
Flow Control Client-Side Interface Signals
Table 2-3
transmit engine. The flow control block is designed per the specifications in Clause 31 of
the IEEE Std 802.3-2002 standard. Flow control frames received by the Ethernet MAC are
automatically handled.
Table 2-3: Flow Control Interface Signals
Signal
CLIENTEMAC#PAUSEREQ
CLIENTEMAC#PAUSEVAL[15:0]
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Direction
This signal denotes an odd number of bytes in the receive data
path when the width of EMAC#CLIENTRXD is set to 16 bits
wide.
Output
In a frame with an odd number of bytes, the
EMAC#CLIENTRXD[7:0] byte is valid on the last byte.
When the width of EMAC#CLIENTRXD is set to 8 bits wide, this
signal should be left unconnected.
This signal is asserted after the last receipt of data to indicate the
Output
reception of a compliant frame.
This signal is asserted after the last receipt of data to indicate the
Output
reception of a non-compliant frame.
The statistics data on the last received data frame. The 27-bit raw
RX statistics vector is multiplexed into a seven-bits per RX clock
Output
cycle output for statistics gathering. See
Vector" in Chapter
Asserted if an Ethernet MAC frame byte (including destination
Output
address to FCS) is received. Valid on every RX clock cycle.
Asserted by the Ethernet MAC after the end of receiving a frame
Output
to indicate a valid EMAC#CLIENTRXSTATS[6:0] output.
Output
See
"Receive Clocking Scheme" in Chapter
Output
Reserved - not used.
describes the signals used by the client to request a flow control action from the
Direction
Input
Asserted by client to transmit a pause frame.
The amount of pause time for the transmitter as defined in the
Input
IEEE Std 802.3-2002 specification.
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Description
"Receiver Statistics
3.
5.
Description
Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
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