Table of Contents
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Date
Version
08/20/07
1.7
• Replaced screen shots with updated images from v4.5 software.
•
• Section
• Section
•
•
•
• Made other typographical edits.
02/06/08
1.8
• Added conditions causing assertion of EMAC#CLIENTRXBADFRAME to
• Rewrote description of ALIGNMENT_ERROR bit in
• Updated
• Added
08/13/08
1.9
• Corrected transposition error in the description column for bit [1] in
• Corrected transposition error in the description column for bits 5.8:7 in
• Rewrote item number 1 for 1000BASE-X auto-negotiation summary
• Updated the link in the first bullet of
05/12/09
2.0
• Chapter 4:
• Chapter 6:
• Chapter 7:
www.BDTIC.com/XILINX
Embedded Tri-Mode Ethernet MAC User Guide
Table
2-11: Revised description of TIEEMAC#CONFIGVEC[63].
"Length/Type Field Error Checks" in Chapter
throughout this section.
"Receiving a PAUSE Control Frame" in Chapter
Table
3-9: Revised definition of Receiver Configuration register bit [25] (LT_DIS).
Figure 4-7
through
Figure 4-10
text: Added IDELAY element to clock input.
Figure
4-24: Corrected placement of BUFG to TXCLIENTCLKOUT.
Reception with Errors," page
Figure 4-28, page
"Core Latency" in Appendix
(values 0 and 1 were switched in second sentence).
(values 01 and 10 were switched).
Operation," page
151).
In sections
"1 Gb/s GMII Only," page
Mode Operation with Byte PHY Enabled (Full-Duplex Only)," page
RGMII Clock Management," page
Mode RGMII v1.3," page
the received clock (GMII_RX_CLK in case of GMII and RGMII_RXC in case of
RGMII) with respect to data. Original method described use of IDELAY and BUFG.
Revised method describes use of a DCM and BUFG.
In
Figure 4-7, page
107,
page
111,
Figure 4-12, page
Figure 4-15, page
119,
Figure 4-16, page
Replaced IDELAY block in clock path with DCM.
"Simulation Models," page
references to SmartModel with references to SecureIP throughout this section. Added
"SecureIP Model," page
Removed content discussing Ethernet MAC wrappers and replaced it
Embedded Ethernet MAC," page
www.xilinx.com
Revision
and
Figure 4-12
through
53.
139.
A.
"Global Buffer Usage," page
107,
"Tri-Mode Operation," page
115,
"Tri-Mode RGMII v2.0," page
120, changed the description of the method used to delay
Figure 4-8, page
108,
Figure 4-9, page
115,
Figure 4-13, page
121, and
155: Removed description of SmartModels. Replaced
155.
167.
3: Numerous textual revisions
3: Last paragraph revised.
Figure 4-16
and accompanying
"Frame
Table 3-5, page
70.
Table 3-13, page 78
Table 4-14, page 144
("Overview of
165.
109,
110,
"1 Gb/s
117, and
110,
Figure 4-10,
116,
Figure 4-14, page
118,
"16-Bit Data Client," page
with"Using the
UG074 (v2.2) February 22, 2010
"Tri-
"Tri-
139,
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