Xilinx Virtex-4 User Manual page 23

Fpga embedded tri-mode ethernet mac
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Table 2-1: Transmit Client Interface Signals (Cont'd)
Signal
EMAC#CLIENTTXACK
EMAC#CLIENTTXCOLLISION
EMAC#CLIENTTXRETRANSMIT
EMAC#CLIENTTXSTATS
EMAC#CLIENTTXSTATSBYTEVLD
EMAC#CLIENTTXSTATSVLD
EMAC#CLIENTTXCLIENTCLKOUT
Client-Side Receive (RX) Signals
Table 2-2
MAC to transfer data to the client.
Table 2-2: Receive Client Interface Signals
Signal
CLIENTEMAC#RXCLIENTCLKIN
EMAC#CLIENTRXD[15:0]
EMAC#CLIENTRXDVLD
EMAC#CLIENTRXFRAMEDROP
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Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
Direction
Handshake signal – Asserted when the Ethernet MAC accepts
the first byte of data. On the next and subsequent rising clock
Output
edges, the client must provide the remainder of the frame data.
See
"Normal Frame Transmission" in Chapter
Asserted by the Ethernet MAC to signal a collision on the
Output
medium. Any transmission in progress should be aborted. This
signal is always deasserted in full-duplex mode.
Asserted by the Ethernet MAC at the same time as the
EMAC#CLIENTTXCOLLISION signal. The client should re-
Output
supply the aborted frame to the Ethernet MAC for
retransmission. This signal is always deasserted in full-duplex
mode.
The statistics data on the last data frame sent. The 32-bit TX raw
Output
statistics vector is output by one bit per cycle for statistics
gathering. See
Asserted if an Ethernet MAC frame byte is transmitted
Output
(including destination address to FCS). This is valid on every TX
clock cycle.
Asserted by the Ethernet MAC after a frame transmission to
Output
indicate a valid EMAC#CLIENTTXSTATS output. See
"Transmitter Statistics Vector" in Chapter
Output
See
"Transmit Clocking Scheme" in Chapter
describes the client-side receive signals. These signals are used by the Ethernet
Direction
Input
See
"Receive Clocking Scheme" in Chapter
Frame data received from the Ethernet MAC. The data path can
be configured to either 8 bits or 16 bits wide. Bits [7:0] are used for
Output
8-bit width. The 16-bit interface is intended to be used in
1000BASE-X PCS/PMA mode. See
Wide Interface" in Chapter
The Ethernet MAC indicates to the client the receipt of valid
Output
frame data.
This signal is asserted to notify the client that an incoming receive
frames destination address does not match any addresses in the
Output
address filter. The signal functions even when the address filter is
not enabled.
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Ethernet MAC Signal Descriptions
Description
"Transmitter Statistics Vector" in Chapter
Description
"Receive (RX) Client – 16-bit
3.
3.
3.
3.
5.
5.
23

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