Xilinx Virtex-4 User Manual page 138

Chapter 4: Physical Interface
PHYEMAC#GTXCLK
Figure 4-27: 1000BASE-X PCS/PMA (8-bit Data Client) Clock Management
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138
250 MHz
MGTCLKP
MGTCLKN
'0'
BUFG
'0'
EMAC#
CLIENTEMAC#TXCLIENTCLKIN
EMAC#CLIENTTXCLIENTCLKOUT
CLIENTEMAC#RXCLIENTCLKIN
EMAC#CLIENTRXCLIENTCLKOUT
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SYNCLK1OUT
GT11CLK_MGT
REFCLK1
RXUSRCLK2
RXUSRCLK
TXOUTCLK1
TXUSRCLK2
TXUSRCLK
GT11
Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
R
Client
Logic
X
X
UG074_3_80_030907