Xilinx Virtex-4 User Manual page 127

R
Table 4-5
The situation is worse at SGMII speeds lower than 1 Gb/s because bytes are repeated
multiple times.
Table 4-5: Maximum Frame Sizes for FPGA Logic RX Elastic Buffers
(100 ppm Clock Tol.)
Using the MGT RX Elastic Buffer
The RX elastic buffer implemented in the MGT can be used reliably when:
•
•
Designers are recommended to select the FPGA Logic RX elastic buffer implementation if
they have any doubts to reliable operation.
Closely Related Clock Sources
Two cases are described with closely related clocks in SGMII mode.
•
www.BDTIC.com/XILINX
Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
10/100/1000 Serial Gigabit Media Independent Interface (SGMII)
translates this into maximum frame lengths at different Ethernet MAC speeds.
Standard Speed
1000BASE-X 1 Gb/s only
SGMII 1 Gb/s
SGMII 100 Mb/s
SGMII 10 Mb/s
10 Mb/s operation is not required. Both 1 Gb/s and 100 Mb/s operate on standard
Ethernet MAC frame sizes only.
When the clocks are closely related (see
Case 1
Figure 4-20 illustrates a simplified diagram of a common situation where the Ethernet
MAC in SGMII mode is interfaced to an external PHY device. A common oscillator
source is used for both the FPGA and the external PHY.
FPGA
Ethernet MAC
Figure 4-20: SGMII Implementation Using Shared Clock Sources
www.xilinx.com
Maximum Frame Size
280,000
280,000
28,000
2,800
"Closely Related Clock
MGT
RX
Elastic
Buffer
125 MHz - 100 ppm
Sources").
SGMII Link
10BASE-T
TXP/TXN
100BASE-T
1000BASE-T
PHY
RXP/RXN
UG074_3_82_012408
Twisted
Copper
Pair
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