10/100/1000 Rgmii; Gb/S Rgmii Interface - Xilinx Virtex-4 User Manual

Fpga embedded tri-mode ethernet mac
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R
Table 4-2: GMII Interface Signals (Cont'd)
Signal
GMII_COL_#
GMII_RX_CLK_#
GMII_RXD[7:0]_#
GMII_RX_DV_#
GMII_RX_ER_#

10/100/1000 RGMII

RGMII, an alternative to GMII, was defined by Hewlett-Packard. It reduces the number of
pins required to connect the Ethernet MAC to the PHY from 24 to 12. RGMII achieves this
50% pin count reduction in the interface by using double data rate (DDR) flip-flops.
For more information on RGMII, refer to the Hewlett-Packard RGMII Specification, version 1.3
and 2.0.

1 Gb/s RGMII Interface

Figure 4-11
this interface, not all the ports of the Ethernet MAC are used.
www.BDTIC.com/XILINX
Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
Direction
Input
Collision detect control signal from PHY, only if tri-mode is selected.
Input
Recovered clock from data stream by PHY.
Input
Receive data from PHY.
Input
Receive data valid control signal from PHY.
Input
Receive data error signal from PHY.
shows the Ethernet MAC configured with RGMII as the physical interface. In
www.xilinx.com
10/100/1000 RGMII
Description
113

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