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Chapter 4: Physical Interface
The FPGA RX Elastic Buffer Requirement
Figure 4-17
MAC in SGMII mode is interfaced to an external PHY device. Separate oscillator sources
are used for the FPGA and the external PHY. The Ethernet specification uses clock sources
with a 100 ppm tolerance. In
the clock source to the FPGA. Therefore, during frame reception, the RX elastic buffer
(implemented in the MGT in this example) starts to fill up.
Following frame reception in the interframe gap period, idles are removed from the
received datastream to return the RX elastic buffer to half-full occupancy. This task is
performed by the clock correction circuitry (see UG076, Virtex-4 RocketIO Multi-Gigabit
Transceiver User Guide).
Assuming separate clock sources, each with 100 ppm tolerance, the maximum frequency
difference between the two devices can be 200 ppm, which translates into a full clock
period difference every 5000 clock periods.
Relating this information to an Ethernet frame, there is a single byte of difference every
5000 bytes of received frame data, causing the RX elastic buffer to either fill or empty by an
occupancy of one.
The maximum Ethernet frame (non-jumbo) has a 1522-byte size for a VLAN frame:
•
•
•
Considering the 10 Mb/s case, 152200/5000 = 31 FIFO entries are needed in the elastic
buffer above and below the halfway point to insure that the buffer does not underflow or
overflow during frame reception. This assumes that frame reception begins when the
buffer is exactly half full.
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124
illustrates a simplified diagram of a common situation where the Ethernet
Figure
FPGA
Ethernet MAC
125 MHz - 100 ppm
Figure 4-17: SGMII Implementation Using Separate Clock Sources
At 1 Gb/s operation, this size translates into 1522 clock cycles
At 100 Mb/s operation, this size translates into 15220 clock cycles (because each byte
is repeated 10 times
At 10 Mb/s operation, this size translates into 152200 clock cycles (because each byte
is repeated 100 times)
www.xilinx.com
4-17, the clock source for the PHY is slightly faster than
MGT
TXP/TXN
RX
RXP/RXN
Elastic
Buffer
125 MHz + 100 ppm
Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
R
SGMII Link
10BASE-T
100BASE-T
1000BASE-T
Twisted
Copper
PHY
Pair
UG074_3_81_012508
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