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About This Guide
This document is the Virtex®-4 FPGA Embedded Tri-Mode Ethernet MAC User Guide.
Guide Contents
This user guide contains the following chapters:
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Additional Resources
For additional information, go to http://www.xilinx.com/support.
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Embedded Tri-Mode Ethernet MAC User Guide
UG074 (v2.2) February 22, 2010
Chapter 1, "Introduction,"
Ethernet MAC and summarizes its features.
Chapter 2, "Ethernet MAC Architecture,"
MAC and defines its signals.
Chapter 3, "Client, Host, and MDIO Interfaces,"
client, host, and MDIO interfaces.
Chapter 4, "Physical Interface,"
interfaces when using the Ethernet MAC.
Chapter 5, "Miscellaneous Functions,"
with the Ethernet MAC.
Chapter 6, "Use Models,"
Ethernet MAC to a processor DCR or an FPGA statistics block.
Chapter 7, "Using the Embedded Ethernet MAC,"
CORE Generator™ wrappers.
Appendix A, "Ethernet MAC Timing Model,"
parameters of the Ethernet MAC timing model.
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introduces the Virtex-4 FPGA Embedded Tri-Mode
describes the architecture of the Ethernet
provides design information for the
describes design considerations for the supported
provides useful information for designing
describes some available models and how to interface the
describes the Verilog and VHDL
provides details on the timing
Preface
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