Sony CXD5602 User Manual page 1005

HPADC High Performance A/D
Converter
HOST I/F HOST Interface
Local AHB ---
LPADC Low Power A/D Converter
NVIC Nested Vectored
Interrupt Controller
PMIC Power Management IC
PMU Power Management Unit
POR Power On Reset
RCOSC ---
RF Radio Frequency
RTC Real Time Clock
SCU Sensor Domain
Sleep ---
SYSCPU System and I/O Processor
SYSIOP System and IOP Domain
SYSPLL ---
SYSTEM Bus ---
SYS SRAM ---
Wakeup
The HPADC is the A/D Converter in the CXD5602.
The HOST I/F is the format to communicate with the external HOST CPU.
The Local AHB is the matrix bus which connects the System and I/O Processor
with the SYS SRAM and the SYSTEM Bus.
The LPADC is the A/D Converter in the CXD5602.
For the NVIC, refer to the following URL.
http://infocenter.arm.com/help/topic/com.arm.doc.ddi0337e/Cihcffda.html
The PMIC is the IC to control power supply. As a companion chip for the
CXD5602, the CXD5247 is prepared. In this document, the CXD5247 is assumed
as the PMIC.
The PMU is the block that performs overall power supply control of the
CXD5602.
Refer to Chapter 3.4.
The POR is the reset that is enabled when power is supplied.
The RCOSC is the internal oscillator block.
Refer to Section 3.5.3.1.
The RF is the frequency band of the GNSS signal.
For the RTC, refer to Chapter 3.6
The SCU is the block which is equipped with the HPADC, LPADC, and the
interface to the external sensors. Please check エラー! 参照元が見つかりませ
ん。. For details, refer to Chapter 3.9.
Sleep is the status that any of the power domains of the CXD5602 becomes OFF,
or any of the DSPs belonging to the power domains is not in operation.
The SYSCPU contains Cortex
SLEEPING signal monitor, and Debug function (ITM).
The Tile address converter and the memory protection unit are equipped outside
the SYSCPU.
(Refer to エラー! 参照元が見つかりません。)
The SYSIOP is the functional block equipped with one Cortex
a variety of controls of the CXD5602, indicated in エラー! 参照元が見つかり
ません。. Refer to Section 2.5.2 as well.
The SYSPLL is the internal PLL. Refer to Section 3.5.3.3.
The SYSTEM Bus is the BUS inside the SYSIOP.
Refer to エラー! 参照元が見つかりません。.
The SYS SRAM is 256 KByte of SRAM inside the System and IOP Domain.
Wakeup is the status that the power domains of the CXD5602 becomes ON, or
the DSPs belonging to the power domains starts operations.
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CXD5602 User Manual
®
-M0+, Interrupt input register, Timer, WDT,
®
-M0+, to perform