Sony CXD5602 User Manual page 996

7..4 LV_ADC1_REFCTRL
3..2 Reserved
1 LV_ADC1_REFLP_EN RW
LV_ADC1_PREAMPLP
0
_EN
RW 0x0
RO 0x0
0x0
RW 0x0
－996/1010－
REF voltage regulator port
<3> reference destination switching
1'b0: internal 0.7 V system power supply
(default)
1'b1: external enable power supply via the
ATB
<2:0> BGR output voltage switching
3'b000: 700mV (default)
3'b001: 750mV
3'b010: 800mV
3'b011: 850mV
3'b100: 500mV
3'b101: 550mV
3'b110: 600mV
3'b111: 650mV
Reserved
Low power mode signal of the REF circuit
(0,0) standby
(0,1) standby
(1,0) active (default)
(1,1) prohibited setting
ADC1 PreAMP low power mode signal
Control used when monitoring the ADC
sampling clock via the ATB
1'b0: off (default)
1'b1: on
CXD5602 User Manual