Normal/Fast Memory ( = 128 Kbytes) Single Byte Access Read Cycle
Table 6.31
Symbol
Parameter
t
Address setup to MAS/ HIGH
11
t
Address hold from MAS/ HIGH
12
t
MAS/ pulse width
13
t
MCE/ LOW to data clocked in
14
t
Address valid to data clocked in
15
t
MOE/ LOW to data clocked in
16
t
Data hold from address, MOE/, MCE/ change
17
t
Address out from MOE/, MCE/ HIGH
18
t
Data setup to CLK HIGH
19
Figure 6.25 Normal/Fast Memory ( = 128 Kbytes) Single Byte Access Read Cycle
(Addr driven by LSI53C875A;
Data driven by memory)
MAS1/
(Driven by LSI53C875A)
MAS0/
(Driven by LSI53C875A)
(Driven by LSI53C875A)
(Driven by LSI53C875A)
MWE/
(Driven by LSI53C875A)
6-42
CLK
MAD
Higher
Address
t
t
11
12
t
13
MCE/
MOE/
1. Middle Address
Electrical Specifications
1.
2.
t
15
2. Lower Address
Min
Max
25
–
15
–
25
–
150
–
205
–
100
–
0
–
50
–
5
–
t
19
3.
t
17
t
14
t
t
16
18
3. Valid Read Data
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns