Mitsubishi Electric MELSEC iQ-F FX5 User Manual page 453

Offset/gain initialization enable code
When the offset/gain initialization request (Un/G70, b5) turns offon by setting the enable code "E20FH" in this area at the
time of initialization of offset/gain, the offset value and the gain value in the flash memory of the multiple input module are
initialized.
When setting anything other than "E20FH" in this area, initialization is not executed.
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
Offset/gain initialization enable code
Offset/gain initialization enable code (In FX2N allocation mode
function)
■Default value
The default value is set to 0.
CH1 Digital output value
The converted digital output value is stored in 16-bit signed binary value.
b15 b14 b13 b12 b11 b10 b9
(2)
(1) Data section
(2) Sign bit 0: Positive, 1: Negative
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH Digital output value
CH Digital output value (in FX2N allocation mode function)
■Refreshing cycle
The value is updated every conversion cycle.
CH1 Digital operation value
When the digital clipping function, scaling function, shift function are used, digital values to which the digital clipping, scale
conversion, and shift-and-add were performed are stored in 16-bit signed binary in the digital operation value.
b15 b14 b13 b12 b11 b10 b9
(2)
(1) Data section
(2) Sign bit 0: Positive, 1: Negative
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH Digital operation value
CH Digital operation value (in FX2N allocation mode
function)
When not using the digital clipping function, scaling function, and shift function, the same value as 'CH1 Digital
output value' (Un\G400) is stored.
CH1
305
1340
b8 b7 b6 b5 b4 b3 b2
(1)
CH1
400
1001
b8 b7 b6 b5 b4 b3 b2
(1)
CH1
402
10
CH2 CH3 CH4
b1 b0
CH2 CH3 CH4
600 800 1000
1003 1005 1007
b1 b0
CH2 CH3 CH4
602 802 1002
11 12 13
CH5 CH6 CH7
CH5 CH6 CH7
1200 1400 1600
1009 1011 1013
CH5 CH6 CH7
1202 1402 1602
14 15 16
APPX
Appendix 12 Buffer Memory Areas
CH8
CH8
A
1800
1015
CH8
1802
17
451