Table of Contents
Advertisement
Address registers
A0
A1
A2
A3
A
B
Multiplier
Program
Counter
Incrementer
Program address
ROM bus
Internal ROM
Panasonic Semiconductor Development Company
1.5
Block Diagram
Data registers
D0
D1
D2
D3
ALU
B u s c o n t r o l l e r
RAM bus
External interface
Internal RAM
External extension bus
Figure 1-8 Functional Block Diagram
28
Panasonic
T1
T2
Multiplication/Division Register
MDR
PSW
Operand address
BR
BG
MN102H75K/F75K/85K/F85K LSI User Manual
General Description
Block Diagram
Clock
Clock
generator
source
Instruction execution
controller
Instruction decoder
Quick decoder
Instruction
Interrupt
queue
controller
Interrupt bus
Peripherals extension bus
Internal peripheral
functions
Advertisement
Table of Contents
