Intel Intel ® ® 6300Esb Ich-Usb Port Connections; Pci-To-Pci Bridge Model - Intel 6300ESB Datasheet

and memory. This will result in overrun or underrun, causing reduced quality of the
isochronous data, such as audio.
Note: PCI configuration write cycles, initiated by the processor, with the following
characteristics will be converted to a Special Cycle with the Shutdown message type.
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Device Number (AD[15:11]) = '11111
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Function Number (AD[10:8]) = '111'
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Register Number (AD[7:2]) = '000000'
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Data = 00h
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Bus number matches secondary bus number
5.1.2

PCI-to-PCI Bridge Model

From a software perspective, the Intel
This bridge connects the Hub Interface to the PCI bus. By using the PCI-to-PCI bridge
software model, the Intel
existing plug-and-play software such that PCI ranges do not conflict with AGP and
graphics aperture ranges in the Host controller.
5.1.3 IDSEL to Device Number Mapping
When addressing devices on the external PCI bus (with the PCI slots) the Intel
6300ESB ICH will assert one address signal as an IDSEL. When accessing device 0, the
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Intel 6300ESB ICH will assert AD16. When accessing Device 1, the Intel
ICH will assert AD17. This mapping continues all the way up to device 15 where the
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Intel 6300ESB ICH asserts AD31. Note that the Intel
functions (AC'97, IDE, USB, and PCI Bridge) are enumerated like they are on a
separate PCI bus (the Hub Interface) from the external PCI bus.
5.1.4 SERR# Functionality
There are several internal and external sources that may cause SERR#. The Intel
6300ESB ICH may be programmed to cause an NMI based on detecting that an SERR#
condition has occurred. The NMI may also be routed to instead cause an SMI#.
Note: Note that the Intel
active onto the PCI bus. The external SERR# signal is an input into the Intel
ICH driven only by external PCI devices. The conceptual logic diagrams in
Figure 7
bits.
Figure 8
NMI# generation.
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Intel 6300ESB I/O Controller Hub
DS
92
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6300ESB ICH may have its decode ranges programmed by
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6300ESB ICH does not drive the external PCI bus SERR# signal
illustrate all sources of SERR#, along with their respective enable and status
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shows how the Intel 6300ESB ICH error reporting logic is configured for
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6300ESB ICH contains a PCI-to-PCI bridge.
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6300ESB ICH's internal
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Intel 6300ESB ICH—5
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6300ESB
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6300ESB
Figure 6 and
November 2007
Order Number: 300641-004US