Offset 09H: Pi-Programming Interface (Sata-D31:F2); Offset 0Ah: Scc-Sub Class Code (Sata-D31:F2) - Intel 6300ESB Datasheet

20.1.5 Offset 09h: PI—Programming Interface (SATA–
D31:F2)
Table 665. Offset 09h: PI—Programming Interface (SATA–D31:F2)
31
Device:
09h
Offset:
8Ah
Default Value:
Bits Name
7
6:4 Reserved
3 SOP_MODE_CAP
2 SOP_MODE_SEL
1 POP_MODE_CAP
0 POP_MODE_SEL
20.1.6 Offset 0Ah: SCC—Sub Class Code (SATA–D31:F2)
Table 666. Offset 0Ah: SCC—Sub Class Code (SATA–D31:F2)
31
Device:
0Ah
Offset:
01h or 04h
Default Value:
Bits Name
7:0 Sub Class Code
®
Intel 6300ESB I/O Controller Hub
DS
742
Attribute:
Description
This read-only bit is a '1' to indicate that the SATA Controller
supports bus master operation
Reserved. Will always return 0.
This read-only bit is a '1' to indicate that the secondary
controller supports both legacy and native modes.
This read-write bits determines the mode that the secondary
IDE channel is operating in.
0 = Legacy-PCI mode (default)
1 = Native-PCI mode
This read-only bit is a '1' to indicate that the primary
controller supports both legacy and native modes.
This read-write bits determines the mode that the primary
IDE channel is operating in.
0 = Legacy-PCI mode (default)
1 = Native-PCI mode
Attribute:
Description
01h when Dev 31, Func 0, offset ACh, bit 23 is '0'; indicates
IDE controller
04h when Dev 31, Func 0, offset ACh, bit 23 is '1'; indicates
RAID controller
2
Function:
Read/Write
8-bit
Size:
2
Function:
Read-Only
8-bit
Size:
Order Number: 300641-004US
®
Intel 6300ESB ICH—20
Access
RO
RO
R/W
RO
R/W
Access
RO
November 2007