Offset 44: Strp—Pci Strap Status - Intel 6300ESB Datasheet

I/o controller hub
Hide thumbs Also See for 6300ESB:
Table of Contents

Advertisement

18.6.1.24Offset 44: STRP—PCI Strap Status
Note: This register indicates the states of various straps for this PCI-X interface.
Table 607. Offset 44: STRP—PCI Strap Status
28
Device
44
Offset
Bits
Name
31:0
Reserved
Reserved.
18.6.1.25Offset 50: PX_CAPID—PCI-X Capabilities Identifier
Note: Identifies this item in the Capabilities list as a PCI-X register set. It returns 07h when
read.
Table 608. Offset 50: PX_CAPID—PCI-X Capabilities Identifier
28
Device
50
Offset
Bits
Name
07:0
Identifier
Indicates this is a PCI-X capabilities list.
0
(ID)
18.6.1.26Offset 51: PX_NXTP—Next Item Pointer
Note: Indicates where the next item in the capabilities list resides. This is the end of the list
and 00h is returned.
Table 609. Offset 51: PX_NXTP—Next Item Pointer
28
Device
51
Offset
Bits
Name
07:0
Reserved
Reserved.
0
®
Intel
6300ESB I/O Controller Hub
DS
674
0
Function
Read-Only
Attribute:
32-bit
Size:
Description
0
Function
Read-Only
Attribute:
8-bit
Size:
Description
0
Function
Read-Only
Attribute:
8-bit
Size:
Description
®
Intel
6300ESB ICH—18
Reset
Access
Value
RO
Reset
Access
Value
07h
RO
Reset
Access
Value
00h
RO
November 2007
Order Number: 300641-004US

Advertisement

Table of Contents
loading

Table of Contents