Block Read/Write Protocol Without Pec; Block Read/Write Protocol With Pec - Intel 6300ESB Datasheet

®
5—Intel 6300ESB ICH
2
I C Mode: For Block Write, when the I
changes slightly. The Intel
or receive the number of bytes (on reads) indicated in the DATA0 register. However, it
will not send the contents of the DATA0 register as part of the message.
Table 124. Block Read/Write Protocol without PEC
l
Bit
1
2–8
9
10
11–18
19
20–27
28
29–36
37
38–45
46
...
...
...
...
Table 125. Block Read/Write Protocol with PEC (Sheet 1 of 2)
Bit
1
2–8
9
10
11–18
November 2007
Order Number: 300641-004US
®
6300ESB ICH will still send the number of bytes (on writes)
Block Write Protocol
Description
Start
Slave Address - 7 bits
Write
Acknowledge from slave
Command code - 8 bits
Acknowledge from slave
Byte Count - 8 bits
2
(Skip this step when I C_En bit
set)
Acknowledge from Slave
(Skip this step when I2C_EN bit
set)
Data Byte 1 - 8 bits
Acknowledge from Slave
Data Byte 2 - 8 bits
Acknowledge from slave
Data Bytes / Slave
Acknowledges...
Data Byte N - 8 bits
Acknowledge from Slave
Stop
Block Write Protocol
Description
Start
Slave address - 7 bits
Write
Acknowledge from slave
Command code - 8 bits
2
C_EN bit is set, the format of the command
Block Read Protocol
Bit
1 Start
2–8 Slave Address - 7 bits
9 Write
10 Acknowledge from slave
11–18 Command code - 8 bits
19 Acknowledge from slave
20 Repeated Start
21–27 Slave Address - 7 bits
28 Read
29 Acknowledge from slave
30–37 Byte Count from slave - 8 bits
38 Acknowledge
39–46 Data Byte 1 from slave - 8 bits
47 Acknowledge
48–55 Data Byte 2 from slave - 8 bits
56 Acknowledge
Data Bytes from slave/
...
Acknowledge
... Data Byte N from slave - 8 bits
... NOT Acknowledge
... Stop
Block Read Protocol
Bit
1 Start
2–8 Slave address - 7 bits
9 Write
10 Acknowledge from slave
11–18 Command code - 8 bits
Intel
Description
Description
®
6300ESB I/O Controller Hub
DS
245