Offset 1C - 1Fh: Mbbar-Bus Master Base Address Register (Audio-D31:F5) - Intel 6300ESB Datasheet

Table 471. Offset 18 - 1Bh: MMBAR—Mixer Base Address Register (Audio—
D31:F5) (Sheet 2 of 2)
31
Device:
18-1Bh
Offset:
00000000h
Default Value:
No
Lockable:
Bits Name
8:3 Reserved
2:1 Type
Resource Type Indicator
0
(RTE)
13.1.13 Offset 1C - 1Fh: MBBAR—Bus Master Base Address
Register (Audio—D31:F5)
Note: This BAR creates 256 bytes of memory space to signify the base address of the bus
master memory space. The lower 64 bytes of the space pointed to by this register point
to the same registers as the NABMBAR.
Table 472. Offset 1C - 1Fh: MBBAR—Bus Master Base Address Register
(Audio—D31:F5)
31
Device:
1C-1Fh
Offset:
00000000h
Default Value:
No
Lockable:
Bits Name
31:8 Base Address
7:3 Reserved
2:1 Type
Resource Type Indicator
0
(RTE)
®
Intel 6300ESB I/O Controller Hub
DS
558
Attribute:
Power Well:
Description
Reserved. Read as '0's.
Indicates the base address exists in 32-bit address space
This bit is set to '0', indicating a request for memory space.
Attribute:
Power Well:
Description
I/O offset to use for decoding the PCM In, PCM Out, and
Microphone 1 DMA engines.
Reserved. Read as '0's.
Indicates the base address exists in 32-bit address space.
This bit is set to '0', indicating a request for memory space.
5
Function:
Read/Write
32-bit
Size:
Core
5
Function:
Read/Write
32-bit
Size:
Core
Order Number: 300641-004US
®
Intel 6300ESB ICH—13
Access
RO
RO
RO
Access
R/W
RO
RO
RO
November 2007