Intel 6300ESB Datasheet page 484

Table 378. PORTSC[0,1]—Port Status and Control Register (Sheet 2 of 2)
X
Device:
Port 0/2: 10-11h
Offset:
Port 1/3: 12-13h
0080h
Default Value:
Bits Name
7 Reserved
Resume Detect
6
(RSM_DET)
5:4 Line Status
Port Enable/Disable
3
Change
Port Enabled/Disabled
2
(PORT_EN)
1 Connect Status Change
0 Current Connect Status
®
Intel 6300ESB I/O Controller Hub
DS
484
Attribute:
Description
Reserved. Always read as '1'.
Software sets this bit to a '1' to drive resume signaling. The
Host Controller sets this bit to a '1' when a J-to-K transition is
detected for at least 32 microseconds while the port is in the
®
Suspend state. The Intel
K-state back onto the bus as long as the bit remains a '1' and
the port is still in the suspend state (bit 12, 2 are '11').
Writing a '0' (from '1') causes the port to send a low-speed
EOP. This bit will remain a '1' until the EOP has completed.
0 = No resume (K-state) detected/driven on port.
1 = Resume detected/driven on port.
These bits reflect the D+ (bit 4) and D- (bit 5) signals lines'
logical levels. These bits are used for fault detect and
recovery as well as for USB diagnostics. This field is updated
at EOF2 time (See Chapter 11 of the USB Specification).
For the root hub, this bit gets set only when a port is disabled
due to disconnect on that port or due to the appropriate
conditions existing at the EOF2 point (See Chapter 11 of the
USB Specification).
0 = No change. Software clears this bit by writing a '1' to the
bit location.
1 = Port enabled/disabled status has changed.
Ports may be enabled by host software only. Ports may be
disabled by either a fault condition (disconnect event or other
fault condition) or by host software. Note that the bit status
does not change until the port state actually changes and that
there may be a delay in disabling or enabling a port when
there is a transaction currently in progress on the USB.
0 = Disable
1 = Enable
Indicates that a change has occurred in the port's Current
Connect Status (see bit 0). The hub device sets this bit for
any changes to the port device connect status even when
system software has not cleared a connect status change. If,
for example, the insertion status changes twice before
system software has cleared the changed condition, hub
hardware will be setting an already-set bit (i.e., the bit will
remain set). However, the hub transfers the change bit only
once when the Host Controller requests a data transfer to the
Status Change endpoint. System software is responsible for
determining state change history in such a case.
0 = No change. Software clears this bit by writing a '1' to the
bit location.
1 = Change in Current Connect Status.
This value reflects the current state of the port and may not
correspond directly to the event that caused the Connect
Status Change bit (Bit 1) to be set.
0 = No device is present.
1 = Device is present on port.
X
Function:
Read/Write
16-bit
Size:
6300ESB ICH will then reflect the
Order Number: 300641-004US
®
Intel 6300ESB ICH—10
Access
RO
R/W
RO
R/WC
R/W
R/WC
RO
November 2007