Offset 08H: Rid-Revision Id Register (Ide-D31:F1); Offset 09H: Pi-Programming Interface (Ide-D31:F1) - Intel 6300ESB Datasheet

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9—Intel 6300ESB ICH
9.1.5 Offset 08h: RID—Revision ID Register (IDE—
D31:F1)
Table 327. Offset 08h: RID—Revision ID Register (IDE—D31:F1)
31
Device:
08h
Offset:
See bit description
Default Value:
Bits Name
7:0 Revision ID Value
9.1.6 Offset 09h: PI—Programming Interface (IDE—
D31:F1)
Table 328. Offset 09h: PI—Programming Interface (IDE—D31:F1)
31
Device:
09h
Offset:
8Ah
Default Value:
Bits Name
7
6:4 Reserved
3 SOP_MODE_CAP
2 SOP_MODE_SEL
1 POP_MODE_CAP
0 POP_MODE_SEL
November 2007
Order Number: 300641-004US
Attribute:
Description
®
Refer to the Intel 6300ESB ICH Specification Update for the
most
up-to-date value of the Revision ID Register.
Attribute:
Description
This read-only bit is a 1 to indicate that the Intel
ICH supports bus master operation
Reserved. Will always return 0.
This read-only bit is a 1 to indicate that the secondary
controller supports both legacy and native modes.
This read-write bits determines the mode that the secondary
IDE channel is operating in.
0 = Legacy-PCI mode (default)
1 = Native-PCI mode
This read-only bit is a 1 to indicate that the primary controller
supports both legacy and native modes.
This read-write bits determines the mode that the primary
IDE channel is operating in.
0 = Legacy-PCI mode (default)
1 = Native-PCI mode
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NOTE: In the Intel 6300ESB ICH, this bit was read-only
with a value of 0.
1
Function:
Read-Only
8-bit
Size:
1
Function:
Read/Write
8-bit
Size:
®
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