Offset 00H: Id-Identification Register; Offset 01H: Ver-Version Register - Intel 6300ESB Datasheet

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Offset 00h: ID—Identification Register

Note: The APIC ID serves as a physical name of the APIC1. This register is reset to '0' on

power-up reset.

Table 578. Offset 00h: ID—Identification Register

Default Value:

Offset 01h: VER—Version Register

Note: Each I/O APIC contains a hardwired Version Register that identifies different

implementations of APIC and their versions. The maximum redirection entry

information also is in this register to let software know how many interrupts are

supported by this APIC.

Table 579. Offset 01h: VER—Version Register

Default Value:

Maximum Redirection

November 2007

Order Number: 300641-004US

Software must program this value before using the APIC.

This is the entry number (0 being the lowest entry) of the

highest entry in the redirection table. It is equal to the

number of interrupt input pins minus one and is in the range

0 through 239. In the Intel

hardwired to 17h to indicate 24 interrupts.

This bit is set to '1' to indicate that this version of the I/O

APIC implements the IRQ Assertion register and allows PCI

devices to write to it to cause interrupts.

This is a version number that identifies the implementation

version. The version number assigned to the Intel

ICH for the I/O (x) APIC is 20h.

this field is

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