End-Of-Interrupt Registers - Motorola MVME5100 Programmer's Reference Manual
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Also See for MVME5100:
- Programmer's reference manual (270 pages) ,
- Manual (127 pages) ,
- Installation & use manual (107 pages)
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Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
End-of-Interrupt Registers
2
Offset
Bit
3
1
Name
Operation
Reset
2-128
3
2
2
2
2
2
2
2
2
0
9
8
7
6
5
4
3
2
R
$00
EOI
END OF INTERRUPT. There is one EOI register per
processor. EOI Code values other than 0 are currently
undefined. Data values written to this register are ignored;
zero is assumed. Writing to this register signals the end of
processing for the highest priority interrupt currently in
service by the associated processor. The write operation
will update the In-Service register by retiring the highest
priority interrupt. Reading this register returns zeros.
Processor 0 $200B0
Processor 1 $210B0
2
2
1
1
1
1
1
1
1
1
0
9
8
7
6
5
4
3
R
$00
$00
Computer Group Literature Center Web Site
1
1
1
2
1
0 9 8 7 6 5 4 3 2 1 0
R
R
$0
EOI
W
$0
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