8259 Interrupts; Table 4-2. Pbc Isa Interrupt Assignments - Motorola MVME5100 Programmer's Reference Manual

8259 Interrupts

There are 15 interrupt requests supported by the Peripheral Bus Controller
(PBC), which is only available if an IPMC761 or IPMC712 is installed.
These 15 interrupts are ISA-type interrupts that are functionally equivalent
to two 82C59 interrupt controllers. Except for IRQ0, IRQ1, IRQ2,
IRQ8_, and IRQ13, each of the interrupt lines can be configured for either
edge-sensitive mode or level-sensitive mode by programming the
appropriate ELCR registers in the PBC.
There is also support for four PCI interrupts, PIRQA_ through PIRQD_.
The PBC has four PIRQ route control registers to allow each of the PCI
interrupt lines to be routed to any of twelve ISA interrupt lines (IRQ0,
IRQ2, IRQ8_, and IRQ13 are reserved for ISA system interrupts). These
active low inputs are used for some of the on-board PCI devices.
Since PCI interrupts are defined as level-sensitive, software must program
the selected IRQ(s) for level-sensitive mode. The assignments of the ISA
interrupts supported by the PBC as shown in the following table:

Table 4-2. PBC ISA Interrupt Assignments

PRI PSIO Routed to
IRQ
Input
1
2 MSK/
IRQ1
3-10
3 RTCX1/ IRQ8_
IRQ8_
4
5 PIRQA_ IRQ10
6 IRQ11
7 MSDT/ IRQ12
IRQ12
8 PIRQC_ IRQ13
http://www.motorola.com/computer/literature
Edge/
ISA Level
IRQ
IRQ0 INT1 Edge
IRQ1 Edge
IRQ2 Edge
INT2 Edge
IRQ9 Level
Level
Level
Edge
Interrupt Source
High Timer 1 / Counter 0
High Not Used
High Cascade Interrupt from
INT2
Low ABORT Switch, RTC
Low Watch Dog 1/2
Low LAN (on front)
Low Internal USB controller
High Not Used
LAN (to rear)
PCI Arbitration
4
1
2
4-3