Motorola MVME5100 Programmer's Reference Manual page 269

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Table 3-18. Deriving tras, trp, trcd and trc Control Bit Values from SPD
Control Bits
Parameter
$FEF800D2
tRP
bit 3
(SPD Byte
27)
(trp)
$FEF800D2
tRCD
bit 7
(SPD Byte
29)
(trcd)
$FEF800D0
tRC
bits 5,6,7
(SPD Bytes
30 and 27)
(trc)
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Information (Continued)
Parameter Expressed
in CLK Periods
0.0 < tRP_CLK <= 2
tRP_CLK = tRP/T
2.0 < tRP_CLK <= 3
(T = CLK Period
3 < tRP_CLK
in nanoseconds)
See Notes 3, 4 and 9
0.0 < tRCD_CLK <= 2
tRCD_CLK = tRCD/T
2.0 < tRCD_CLK <= 3
(T = CLK Period
3 < tRCD_CLK
in nanoseconds)
See Notes 5, 6 and 9
0.0 < tRC_CLK <= 6.0
6.0 < tRC_CLK <= 7.0
7.0 < tRC_CLK <= 8.0
8.0 < tRC_CLK <= 9.0
tRC_CLK = (tRAS +
9.0 < tRC_CLK <= 10.0
tRP)/T
(T = CLK Period
in nanoseconds)
See Notes 7, 8 and 9
Software Considerations
Possible Control Bit Values
10.0 < tRC_CLK <=
11.0
11.0 < tRC_CLK
3
trp =%0
trp =%1
Illegal
trcd =%0
trcd =%1
Illegal
trc =%110
trc =%111
trc =%000
trc =%001
trc =%010
trc =%011
illegal
3-79

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