Timer Vector/Priority Registers
Offset
Bit
3
3
2
2
1
0
9
8
Name
Operation
Reset
MASK
ACT
PRIOR
VECTOR VECTOR. This vector is returned when the Interrupt
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Timer 0 - $01120
Timer 1 - $01160
Timer 2 - $011A0
Timer 3 - $011E0
2
2
2
2
2
2
2
2
1
7
6
5
4
3
2
1
0
9
TIMER VECTOR/PRIORITY
PRIOR
R
R/W
$000
MASK. Setting this bit disables any further interrupts
from this source. If the mask bit is cleared while the bit
associated with this interrupt is set in the IPR, the interrupt
request will be generated.
ACTIVITY. The activity bit indicates that an interrupt has
been requested or that it is in-service. The ACT bit is set
to a one when its associated bit in the Interrupt Pending
Register or In-Service Register is set.
PRIORITY. Interrupt priority 0 is the lowest and 15 is the
highest. Note that a priority level of 0 will not enable
interrupts.
Acknowledge register is examined upon acknowledgment
of the interrupt associated with this vector.
1
1
1
1
1
1
1
1
1
8
7
6
5
4
3
2
1
0 9 8 7 6 5 4 3 2 1 0
R
$0
$00
Registers
2
VECTOR
R/W
$00
2-121