Ppc Slave Address (3) Register - Motorola MVME5100 Programmer's Reference Manual

Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
2

PPC Slave Address (3) Register

Address
Bit
0 1 2 3 4 5 6 7 8 9
Name
Operation
Reset
2-90
MEM PCI Memory Cycle. If set, the corresponding PPC Slave
will generate transfers to or from PCI memory space.
When clear, the corresponding PPC Slave will generate
transfers to or from PCI I/O space using the addressing
mode defined by the IOM field.
IOM PCI I/O Mode. If set, the corresponding PPC Slave will
generate PCI I/O cycles using spread addressing as
defined in the section titled
clear, the corresponding PPC Slave will generate PCI I/O
cycles using contiguous addressing. This field only has
meaning when the MEM bit is clear.
1
0
START
R/W
Regbase 0xfeff0000 => $8000
Regbase 0xfefe0000 => $9000
The PPC Slave Address Register 3 (XSADD3) contains address
information associated with the mapping of PPC memory space to PCI I/O
space. XSADD3 (in conjunction with XSOFF3/XSATT3) is the only
register group that can be used to initiate access to the PCI
CONFIG_ADDRESS ($80000CF8) and CONFIG_DATA ($80000CFC)
registers. The power up value of XSADD3 (and XSOFF3/XSATT3) are
set to allow access to these special register spaces without PPC register
initialization.
Generating PCI
MSADD3 - $FEFF0058
1 1 1 1 1 1 1 1 1
1 2 3 4 5 6 7 8 9
XSADD3
Regbase 0xfeff0000 => $8080
Regbase 0xfefe0000 => $9080
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Cycles. When
2 2 2 2 2 2 2 2 2
0 1 2 3 4 5 6 7 8
END
R/W
2 3 3
9 0 1