Comments And Suggestions - Motorola MVME5100 Programmer's Reference Manual

Chapter 2, Hawk PCI Host Bridge & Multi-Processor Interrupt
Controller, provides a description of the Hawk's PowerPC to Local Bus
Bridge (PHB) and the Multi-Processor Interrupt Controller (MPIC)
including a list of features, a block diagram, a functional description and
corresponding register tables.
Chapter 3, System Memory Controller
the System Memory Controller (SMC) portion of the Hawk ASIC
including a features list, block diagrams, functional descriptions, and an
explanation and description of all corresponding registers.
Chapter 4, Hawk Programming
programming details that are relevant to every day programming
functions, including a listing of the Hawk MPIC External Interrupts, the
8259 Interrupts, and a description of certain exceptions such as sources of
reset, error notification and handling, endian issues, and processor/Hawk
relationships.
Appendix A, Related
Motorola manuals, vendor documentation and industry specifications.
Appendix B, MVME5100 VPD Reference
explanation of the VPD reference information including certain "How to"
info, as well as specific VPD Data Definitions.

Comments and Suggestions

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Documentation, provides a listing of related
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(SMC), provides an explanation of
Details, procides a summary of the Hawk
Information, provides an
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