Rom/Flash Speeds; Table 3-5. Ppc60X Bus To Rom/Flash Access Timing (120Ns @ 100 Mhz) - Motorola MVME5100 Programmer's Reference Manual

ROM/Flash Speeds

The SMC provides the interface for two blocks of ROM/Flash. Access
times to ROM/Flash are programmable for each block. Access times are
also affected by block width. Refer to
Table 3-8
Table 3-5. PPC60x Bus to ROM/Flash Access Timing
ACCESS TYPE
4-Beat Read
4-Beat Write
1-Beat Read (1 byte)
1-Beat Read (2 to 8
bytes)
1-Beat Write
Note
http://www.motorola.com/computer/literature
for specific timing numbers.
(120ns @ 100 MHz)
CLOCK PERIODS REQUIRED FOR:
1st Beat 2nd Beat
16 64 16 64
Bits Bits Bits Bits
70 22 64 16
22 22 - -
70 22 - -
21 21 - -
The information in Table 3-5
configured for devices with an access time equal to 12 clock
periods.
Functional Description
Table 3-5, Table 3-6,
3rd Beat 4th Beat
16 64 16
Bits Bits Bits
64 16 64
N/A
- - -
- - -
- - -
applies to access timing when
Table 3-7, and
Total
Clocks
64 16 64
Bits Bits Bits
16 262 70
N/A
- 22 22
- 70 22
- 21 21
3-19
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