I2C Page Write .......................................................................................... 3-29
I2C Sequential Read.................................................................................. 3-31
Refresh/Scrub ................................................................................................... 3-34
CSR Accesses................................................................................................... 3-34
External Register Set ........................................................................................ 3-34
Chip Configuration........................................................................................... 3-35
Programming Model................................................................................................ 3-35
CSR Architecture ............................................................................................. 3-35
Register Summary ............................................................................................ 3-36
ECC Control Register ............................................................................... 3-45
Error Logger Register ............................................................................... 3-49
I2C Clock Prescaler Register .................................................................... 3-63
I2C Control Register ................................................................................. 3-63
I2C Status Register.................................................................................... 3-64
32-Bit Counter........................................................................................... 3-72
External Register Set................................................................................. 3-72
tben Register.............................................................................................. 3-73
Software Considerations.......................................................................................... 3-74
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