Figure 3-10. Read/Write Check-Bit Data Paths - Motorola MVME5100 Programmer's Reference Manual

System Memory Controller (SMC)
3
3-46
0
Normal
View of
Data
(rwcb=0)
0
Check-bit
View
(rwcb=1)

Figure 3-10. Read/Write Check-bit Data Paths

Note that if test software attempts to force a single-bit error to a location
using the rwcb function, the scrubber may correct the location before the
test software gets a chance to check for the single-bit error. This can be
avoided by disabling scrub writes. Also note that writing bad check-bits
can set the elog bit in the Error Logger Register. The writing of check-bits
causes the SMC to perform a read-modify-write to SDRAM. If the location
to which check-bits are being written has a single- or double-bit error, data
in the location may be altered by the write check-bits operation. To avoid
this, it is recommended that the derc bit also be set while the rwcb bit is
set. A possible sequence for performing read-write check-bits is as
follows:
1. Disable scrub writes by clearing the swen bit if it is set.
2. Make sure software is not using DRAM at this point, because while
rwcb is set, DRAM will not function as normal memory.
3. Set the derc and rwcb bits in the Data Control register.
4. Perform the desired read and/or write check-bit operations.
64 bits
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