Motorola MVME5100 Programmer's Reference Manual page 237

5. Clear the derc and rwcb bits in the Data Control register.
6. Perform the desired testing related to the location/locations that
7. Enable scrub writes by setting the swen bit if it was set before.
derc
1. During reads, data is presented to the PPC60x data bus uncorrected
2. During single-beat writes, data is written without correcting single-
3. During single-beat writes, the write portion of the read-modify-
4. During scrub cycles, if swen is set, a read-writes to SDRAM
apien
scien
dpien
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have had their check-bits altered.
Setting derc to one alters SMC operation as follows:
from the SDRAM array.
bit errors that may occur on the read portion of the read-modify-
write. Check-bits are generated for the data being written.
write happens regardless of whether there is a multiple-bit error
during the read portion. No correction of data is attempted. Check-
bits are generated for the data being written.
happens with no attempt to correct data bits. Check-bits are
generated for the data being written.
derc is useful for initializing SDRAM after power-up and
for testing SDRAM, but it should be cleared during
normal system operation.
When apien is set, the logging of a PPC60x address parity
error causes the int bit to be set if it is not already. When
the int bit is set, the Hawk's internal error interrupt is
asserted.
When scien is set, the rolling over of the
SBE COUNT register causes the int bit to be set if it is
not already. When the int bit is set, the Hawk's internal
error interrupt is asserted.
When dpien is set, the logging of a PPC60x data parity
error causes the int bit to be set if it is not already. When
the int bit is set, the Hawk's internal error interrupt is
asserted.
Programming Model
3-47
3