Board Last Reset Register - Motorola MVME5100 Programmer's Reference Manual

Product Data and Memory Maps
1

Board Last Reset Register

REG
BIT
FIELD
OPER
RESET
REQUIRED
OR
OPTIONAL
PWRON
FPBTN
WDT2
CPCIRST
CMDRST
SWHRST
1-32
This register is used to retain the source of the most recent reset.
Board Last Reset Register - Offset 80F8h
RD0 RD1 RD2
R R
x x
X X
Power-On Reset. If set, a power-on reset has occurred or an
undervoltage reset has occurred on 3.3V or 5V.
Front Panel Push Button Reset. If set, a front panel push button
reset has occurred.
Watchdog Timer Level 2 Reset. If set, a level 2 Watchdog timer
reset has occurred.
CompactPCI Reset. If set, a CompactPCI RST# reset has
occurred. Not applicable for the MVME5100.
CompactPCI Command Reset. If set, a software reset command
has been issued to the 21554 bridge from the CompactPCI bus.
Not applicable for MVME5100.
Software Hard Reset. If set, a software initiated hard reset has
occurred via the PBC Port 92 Fast Reset bit of the SA Test Mode
register.
RD3 RD4
R R R
x x x
O O O
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RD5 RD6 RD7
R R R
x x x
O O O