External Interrupts; Schematic Diagram Of The User Interrupt Interface - Motorola Digital DNA DSP56F807 Hardware User Manual

Table 2-5. Parallel JTAG Interface Connector Description

2.8 External Interrupts

Two on-board push-button switches are provided for external interrupt generation, as
shown in Figure 2-6. S2 allows the user to generate a hardware interrupt for signal line
IRQA. S3 allows the user to generate a hardware interrupt for signal line IRQB. These two
switches allow the user to generate interrupts for his user-specific programs.
Figure 2-6. Schematic Diagram of the User Interrupt Interface
Pin # Signal
9 PORT_VCC
10 NC
11 PORT_TDO
12 NC
13 PORT_CONNECT
SW2
0.1µF
SW3
Technical Summary
P1
Pin #
22
23
24
25
+3.3V
DSP56F807
10K
IRQA
+3.3V
10K
IRQB
0.1µF
External Interrupts
Signal
GND
GND
GND
GND
2-11