Ppc Slave Address (0,1 And 2) Registers - Motorola MVME5100 Programmer's Reference Manual

Hide thumbs Also See for MVME5100:
Table of Contents

Advertisement

Hawk PCI Host Bridge & Multi-Processor Interrupt Controller

PPC Slave Address (0,1 and 2) Registers

2
Address
Bit
Name
Operation
Reset
2-88
The PPC Slave Address Registers (XSADD0, XSADD1, and XSADD2)
contains address information associated with the mapping of PPC memory
space to PCI memory I/O space. The fields within the XSADDx registers
are defined as follows:
START
R/W
$0000
START
Start Address. This field determines the start address of a
particular memory area on the PPC bus which will be used
to access PCI bus resources. The value of this field will be
compared with the upper 16 bits of the incoming PPC
address.
END
End Address. This field determines the end address of a
particular memory area on the PPC bus which will be used
to access PCI bus resources. The value of this field will be
compared with the upper 16 bits of the incoming PPC
address.
XSADD0 - $FEFF0040
XSADD1 - $FEFF0048
XSADD2 - $FEFF0050
XSADDx
Computer Group Literature Center Web Site
END
R/W
$0000

Advertisement

Table of Contents
loading

Table of Contents