Pchip A/G Pci Error Register (Gperror, Aperror - Compaq AlphaServer ES45 Service Manual

D.15 Pchip A/G PCI Error Register (GPERROR, APERROR)
This register is used for logging PCI errors on the GPCI or APCI buses
respectively.
The GPCI and APCI registers are identical. If any of bits <11:2> are set, then
this entire register is frozen and the Pchip output signal h_err is asserted. Only
bits <1:0> can be set after that. All other values will be held until bits <11:2, 0>
are clear. When an error is detected and one of bits <10:2> is set, the associated
cache block address, PCI command, and syndrome is captured in bits <55:52,
48:14> of this register. A monster window address has PCI address bit <40> set,
and this is reflected in A/G PERROR bit <48>. Likewise, a non-MWIN dual
address cycle (DAC) has PCI address bit <39> set, which shows up in A/G
PERROR bit <47>. Bits <46:14> of A/G PERROR contain the longword PCI
address bits <34:02> (a DAC could have bits set in PCI address bits <34:32>).
Bits <11:1> of this register are only set if the corresponding enable bits are set
in the PERREN register.
NOTE: Software must not perform back-to-back writes to this register. A write
to this register must be followed by a read from any PA-chip CSR, or a
write to any other CSR (except for the corresponding A/G PERRSET
register). Back-to-back writes will yield unpredictable results.
Registers D-31