I_Ctl Register Fields - Compaq AlphaServer ES45 Service Manual

Table D–8 I_CTL Register Fields (Continued)
Name Extent
SL_RCV <14>
SL_XMIT <13>
HWE <12>
BP_MODE<1:0> <11:10>
SBE<1:0> <9:8>
SDE<1:0> <7:6>
D-18 ES45 Service Guide
Type Description
RO When in native mode, any transition on
SL_RCV, driven from the SromData_H pin,
results in a trap to the PALcode interrupt
handler. When in PALmode, all interrupts
are blocked. The interrupt routine then
begins sampling SL_RCV under a software
timing loop to input as much data as
needed, using the chosen serial line protocol.
WO When set, drives a value on SromClk_H.
RW,0 If set, allow PALRES intructions to be
executed in kernel mode. Note that
modification of the ITB while in kernel
mode/native mode may cause
UNPREDICTABLE behavior.
RW,0 Branch Prediction Mode Selection.
BP_MODE<1>, if set, forces all branches to
be predicted to fall through. If clear, the
dynamic branch predictor is chosen.
BP_MODE<0>. If set, the dynamic branch
predictor chooses local history prediction. If
clear, the dynamic branch predictor chooses
local or global prediction based on the state
of the chooser.
RW,0 Stream Buffer Enable.
The value in this bit field specifies the
number of Istream buffer prefetches (besides
the demand-fill) that are launched after an
Icache miss. If the value is zero, only
demand requests are launched.
RW,0 PALshadow Register Enable.
Enables access to the PALshadow registers.
If SDE<1> is set, R4-R7 and R20-R23 are
used as PALshadow registers. SDE<0> does
not affect 21264 operation.