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D.6 Interrupt Enable and Current Processor Mode
Register (IER_CM)
The Interrupt Enable and Current Processor Mode Register (IER_CM)
contains the interrupt enable and current processor mode bit fields.
These bit fields can be written either individually or together with a single
HW_MTPR instruction. When bits <7:2> of the IPR index field of a HW_MTPR
instruction contain the value 000010, this register is selected. Bits <1:0> of the
IPR index indicate which bit fields are to be written: bit<1> corresponds to the
IER field and bit<0> corresponds to the processor mode field. A HW_MFPR
instruction to this register returns the values in both fields.
63
39
38
33
32
31 30
29
28
14
13
12
5
4
3
2
0
EIEN[5:0]
SLEN
CREN
PCEN[1:0]
SIEN[15:1]
ASTEN
CM[1:0]
LK99-0022A
D-10
ES45 Service Guide
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