Isum Register Fields - Compaq AlphaServer ES45 Service Manual

Table D–6 ISUM Register Fields
Name Extent
Reserved <63:39>
EI<5:0> <38:33>
SL <32>
CR <31>
PC<1:0> <30:29>
SI<15:1> <28:14>
Reserved <13:11>
ASTU, ASTS <10>,<9>
Reserved <8:5>
ASTE, ASTK <4>,<3>
Reserved <2:0>
Type Description
RO External Interrupts
RO Serial Line Interrupt
RO Corrected Read Error Interrupts
RO Performance Counter Interrupts
PC0 when PC<0> is set.
PC1 when PC<1> is set.
RO Software Interrupts
RO AST Interrupts
For each processor mode, the bit is set if
an associated AST interrupt is pending.
This includes the mode's ASTER and
ASTRR bits and whether the processor
mode value held in the IER_CM register
is greater than or equal to the value for
the mode.
RO AST Interrupts
For each processor mode, the bit is set if
an associated AST interrupt is pending.
This includes the mode's ASTER and
ASTRR bits and whether the processor
mode value held in the IER_CM register
is greater than or equal to the value for
the mode.
Registers D-13