Compaq AlphaServer ES45 Service Manual page 393

Table D–14 Pchip Error Register (Continued)
Field Bits
ADDR <46:14>
RES <13:11>
IPTPW <10>
IPTPR <9>
NDS <8>
DPE <7>
TA <6>
APE <5>
SGE <4>
Type Init Description
RO 0 Contains PCI address bits <34:02>
RAZ 0 Reserved
R,W1C 0 Invalid peer-to-peer read.
R,W1C 0 Invalid peer-to-peer write.
R,W1C 0 No devsel received as a PCI master.
R,W1C 0
Pchip detected a parity error on data it
received from another PCI device. If the
command logged in bits <55:52> of this
register is a read, the PCI transaction
that encountered the error was a PIO
Read or a PTP read on the destination
bus, and the Pchip was the master. If
the command logged is a write, the
transaction that encountered the error
was a DMA Write or a PTP write on the
source bus (will only be logged in the
GPERROR for Pchip Rev 0) and the
Pchip was a target.
R,W1C 0 Target abort received as PCI master.
R,W1C 0 Address parity error detected as target.
R,W1C 0 Scatter Gather Error, invalid page table
entry.
Continued on next page
Registers D-33