Compaq AlphaServer ES45 Service Manual page 364

Table D–1 Ibox Status Register Fields (Continued)
Name Bits
ICM <33>
OVR<2:0> <32:30>
PAR <29>
Reserved <28:0>
D-4 ES45 Service Guide
Type Description
Instead, these traps cause pipeline redirection and can
be distinguished by examining the PMPC value for the
presence of the corresponding PAL-code entry offset
addresses indicated below. In these cases, the
ProfileMe interrupt will normally be delivered when
exiting the trap PALcode flow and the EXC_ADDR
register will contain the original PC that encountered
the redirect trap.
PMPC<14:0>
0581
0481
0681
RO ProfileMe Icache Miss.
This bit indicates that the profiled instruction was
contained in an aligned 4-instruction Icache fetch block
that requested a new Icache fill stream.
RO ProfileMe Counter 0 Overcount.
This bit indicates a value (0-7) that must be subtracted
from the counter 0 result to obtain an accurate count of
the number of instructions retired in the interval
beginning three cycles after the profiled instruction
reaches pipeline stage 2 and ending four cycles after
the profiled instruction is retired.
WIC
Icache Parity Error.
This bit indicates that the Icache encountered a parity
error on instruction fetch. When a parity error is
detected, the Icache is flushed, a replay trap back to
the address of the error instruction is generated, and a
correctable read interrupt is requested. See also
I_STAT<LAM>.
RO Reserved for COMPAQ
Trap
ITB miss
Istream Access Violation
Interrupt