System Architecture - Compaq AlphaServer ES45 Service Manual

1.1

System Architecture

The system uses a switch-based interconnect system that maintains
constant performance even as the number of transactions multiplies.
Figure 1–1 System Block Diagram
C-chip
First
CPU
CPUs
B-cache
1-2 ES45 Service Guide
Command, Address, and Control Lines for Each Memory Array
Control Lines for D-chips
CAPbus
P-chip
64 bit PCI
64 bit PCI
P-chip
64 bit PCI
64 bit PCI
PADBus
CPU
Data
Bus
8 D-chips
1 or 2
Memory
Arrays
Memory
Data
Bus
1 or 2
Memory
Arrays
PKW1400A-99