Mitsubishi Q00JCPU User Manual page 870

APPENDICES
Special
ACPU
Register
Special Register for
after
Register Modification
Conversion
D9200 SD1200
D9201 SD1201
D9202 SD1202
D9203 SD1203
D9204 SD1204
App
- 81 Appendix 2 Special Register List
(12)Special register list dedicated for QnA
TableApp.30 Special register
Special
Name
0 : Normal end
ZNRD 2 : ZNRD instruction
instruction
processing 3 : Error at relevant
–
result
(LRDP for 4 : Relevant station
ACPU)
0 : Normal end
ZNWR 2 : ZNWR instruction
instruction
processing 3 : Error at relevant
–
result
(LWTP for 4 : Relevant station
ACPU)
Stores conditions for
–
up to numbers 1 to 16
Local station
link type
Stores conditions for
–
up to numbers 17 to
32
0 : Forward loop,
1 : Reverse loop,
2 : Loopback
–
Link status 3 : Loopback
4 : Loopback
5 : Data link disabled
Meaning
Stores the execution result of the ZNRD (word device read)
instruction
• ZNRD instruction setting fault.... Faulty setting of the ZNRD
setting fault
station • Corresponding station error....... One of the stations is not
ZNRD execution • ZNRD cannot be executed in the corresponding station .....
disabled
Stores the execution result of the ZNWR (word device write)
instruction.
• ZNWR instruction setting fault ... Faulty setting of the ZNWR
setting fault
station • Corresponding station error....... One of the stations is not
ZNWR execution • ZNWR cannot be executed in the corresponding station .....
disabled
Stores whether the slave station corresponds to MELSECNET or
MELSECNET II.
• Bits corresponding to the MELSECNET II stations become "1."
• Bits corresponding to the MELSECNET stations or unconnected
become "0."
Device
number
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
SD1202 L16 L15 L14 L13 L12 L11
SD1203 L32 L31 L30 L29 L28 L27
SD1241 L48 L47 L46 L45 L44 L43
SD1242 L64 L63 L62 L61 L60 L59
• If a local station goes down during the operation, the contents
before going down are retained.
Contents of SD1224 to SD1227 and SD1228 to SD1231 are ORed.
If the corresponding bit is "0", the corresponding bit of the special
register above becomes valid.
• If the host (master) station goes down, the contents before going
down are also retained.
Stores the present path status of the data link.
• Data link in forward loop
Master
station
during data link
during data link
• Data link in reverse loop
implemented in
forward/reverse
Master
directions
station
implemented only
in forward
direction
Forward loop Reverse loop
implemented only
in reverse
• Loopback implemented in forward/reverse directions
direction
Master
station
Forward loopback
Details
instruction constant, source, and/
or destination.
communicating.
The specified station is a remote I/
O station.
instruction constant, source, and/
or destination.
communicating.
The specified station is a remote I/
O station.
Bit
L10 L9 L8 L7 L6 L5 L4 L3 L2 L1
L26 L25 L24 L23 L22 L21 L20
L42 L41 L40 L39 L38 L37 L36
L58 L57 L56 L55 L54 L53 L52
Station Station Station
No.1 No.2 No. n
Forward loop Reverse loop
Station
Station Station
No. n
No.1 No.2
Station
Station Station Station
No. n
No.1 No.2 No.3
Reverse loopback
Corresponding
CPU
L19 L18 L17
L35 L34 L33
L51 L50 L49
QnA