Mitsubishi Q00JCPU User Manual page 817

APPENDICES
Number Name
Other system OFF : No error
SM1610
diagnostics error ON : Error
OFF : No self diagnostics
Other systems self
SM1611
diagnostics error. ON : Self diagnostics error
OFF : No common error
Other system common
SM1615
error information ON : Common error
OFF : No error individual
Error individual
SM1616
information ON : Error individual
OFF : No individual error
Error individual
SM1626 information for other
ON : Individual error
systems
OFF to ON:
Standby system
SM1649 Cancels error of standby
cancel error flag
system
SM1653 STOP contact STOP status
SM1654 PAUSE contact PAUSE status
SM1655 STEP-RUN contact STEP-RUN status
*2 This shows the special relay(SM
TableApp.15 Special relay
Meaning
• Turns on when a diagnostics error occurs. (Includes
error detection when annunciator is ON, and by CHK
instruction)
• Corresponds to status of SM0 at other system
• Turns on when a self diagnostics error occurs.
error occurred (Dose not include error detection when annunciator
is ON, and by CHK instruction)
occurred • Corresponds to status of SM1 at other system
• Turns on when there is common error information at
information present
other system
• Corresponds to status of SM5 at other system
information present
information • Turns on when there is error individual information
and the SM1600 is on.
information
• Turns on when there is individual error information at
information present
other system
• Corresponds to status of SM16 at other system
information present
By turning this relay from OFF to ON, the continue error
that occurred in the standby system CPU module can
be canceled.
Use SD1649 to specify the error code of the error to be
canceled.
• Turns on when in the STOP status.
• Turns on when in the PAUSE status.
• Turns on when in the STEP-RUN status.
) for the host system CPU.
Explanation
(When Set)
S (Each END)
S (Each END)
S (Each END)
S (Each END)
S (Each END)
S (Each END)
S (Each END)
S (Each END)
Appendix 1 Special Relay List
Corresp
onding
Set by Corresponding
Host
CPU
SM
*2
SM0
SM1 QnPRH
SM5
SM16 Q4AR
SM16
QnPRH
–
U
SM203
SM204 Q4AR
SM205
App
9
10
11
12
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