Fujitsu 467 Manual

Gdc board
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Prepared
Manfred Ortmann
Approved
Receiver:
Checked
Manual
467 / GDC Board
Version PA 3.5
May 14, 2008
http://www.fujitsu.com/emea/services/microelectronics
Preliminary
Document Number
Date
Revision
2008-05-14
PA 3.5
Info:
M. Carstens-Behrens mycable GmbH
Storage
Mycable01
1(36)

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  Summary of Contents for Fujitsu 467

  • Page 1 Preliminary 1(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Receiver: Info: M. Carstens-Behrens mycable GmbH Manual 467 / GDC Board Version PA 3.5 May 14, 2008 http://www.fujitsu.com/emea/services/microelectronics...
  • Page 2 Preliminary 2(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01...
  • Page 3 Mycable01 Developer’s Manual for the 467 / GDC Board Summary This manual provides detailed technical information for system architects, hardware and software developers, who work with the 467 / GDC board version PA3 for evaluation and development purpose. Enclosures None.
  • Page 4 Preliminary 4(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Revision History Version Date Sign Description PA 3.1 2008-03-25 Create this document PA 3.2 2008-04-09 2.2.3 CPU – Mode pin description added PA 3.3 2008-05-05 2.2.3 CPU –...
  • Page 5: Table Of Contents

    PA 3.5 Mycable01 Table of Contents 1 OVERVIEW........................6 1.1 Manual Scope......................6 1.2 Putting into Operation..................... 6 467 / GDC BOARD..................... 7 2.1 System Architecture....................7 2.2 Function Units......................9 2.2.1 Power Supply....................10 2.2.2 Reset......................10 2.2.3 CPU......................11 2.2.4 Graphic Display Controller ( GDC ) Module..........
  • Page 6: Overview

    Storage 2008-05-14 PA 3.5 Mycable01 Overview Manual Scope This manual provides detailed technical information about the 467 / GDC board for system architects, hardware and software developers covering: System architecture description and users manual • Hardware architecture • Mechanical information •...
  • Page 7: 467 / Gdc Board

    Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 467 / GDC Board 2.1 System Architecture The system architecture of the 467 / GDC board is shown in picture 2-1. Pic. 2-1: 467 / GDC board block diagram...
  • Page 8 Preliminary 8(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Picture 2-2: 467 / GDC board top side Picture 2-3: 467 / GDC board bottom side...
  • Page 9: Function Units

    Preliminary 9(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 2.2 Function Units Overview in the available interfaces: 10/100 Ethernet – 2x serial ports – 2x CAN – DVI-I – Power supply – Video Input –...
  • Page 10: Power Supply

    PA 3.5 Mycable01 2.2.1 Power Supply Connect the 467 / GDC board with a power supply between 6 and 25 V DC and approximate 10 Watt at connector X100. Be aware to use the correct polarity as shown in picture 2-4.
  • Page 11: Cpu

    Mycable01 2.2.3 CPU The CPU MB91F467DA from Fujitsu ( U500 ) is used. External 2x 1 Gbit Flash Memory ( U580, U581 ), 128Mx16 SDRAM ( U591 ) and 512kx16 SRAM ( U592 ) are connected. The mode pins of the CPU MD_2 and MD_1 are set fixed to logical '0'.
  • Page 12 Preliminary 12(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 The CPU MB91F467DA has following features Core frequency 96 MHz Resource frequency 48 MHz Watchdog Bit Search Reset Input Clock Modulator DMA 5 ch MPU/EDSU 16 BP (8 MPU ch) Flash external 1024 kB + 64 kB Flash Protection...
  • Page 13 Preliminary 13(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Following picture shows the block diagram of the CPU. More details see datasheet.
  • Page 14: Graphic Display Controller ( Gdc ) Module

    Preliminary 14(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 2.2.4 Graphic Display Controller ( GDC ) Module For a GDC module the 2.54 mm connectors X300 and X301 ( SSM-120-S-DV-P from Samtec ) and the 1.27 mm connector X302 ( FLE-120-01-G-DV-A-P from Samtec ) are available.
  • Page 15 Preliminary 15(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Following table shows the assignment of pins, signals and function from the connector X300: Signal Function Ground Ground CPU_D16 CPU data signal CPU_D17 CPU data signal CPU_D18 CPU data signal CPU_D19...
  • Page 16 Preliminary 16(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Signal Function I2C_SCL I2C SCL I2C_SDA I2C SDA Ground Ground RESET#0 Reset GDC_BCLKI CPU BCLKI Ground Ground Table 2-1: Pin assignment X300 Following table shows the assignment of pins, signals and function from the connector X301: Signal Function Ground...
  • Page 17 Preliminary 17(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Signal Function GDC_A18 CPU address signal GDC_A19 CPU address signal GDC_A20 CPU address signal GDC_A21 CPU address signal GDC_A22 CPU address signal GDC_A23 CPU address signal Not connected Not connected Not connected...
  • Page 18 Preliminary 18(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Signal Function CPU_D8 CPU data signal CPU_D9 CPU data signal CPU_D10 CPU data signal CPU_D11 CPU data signal CPU_D12 CPU data signal CPU_D13 CPU data signal CPU_D14 CPU data signal CPU_D15...
  • Page 19: Serial Ports

    Preliminary 19(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 2.2.5 Serial Ports UART 0 is available at the 9-pin Sub-D female connector X800 with RS-232 inputs and outputs. UART 1 is available at the 9-pin Sub-D female connector X801 with RS-232 inputs and outputs. As transceiver with enhanced electrostatic discharge ( ESD ) protection the MAX3243EIPW ( U800, U801 ) are used.
  • Page 20: Ethernet

    Preliminary 20(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 2.2.6 Ethernet At the RJ45 connector X600 the Ethernet interface is available. The Ethernet interface is implemented with the 10/100 Ethernet controller LAN9218 ( U600 ) from SMSC.
  • Page 21: Universal Serial Bus ( Usb )

    Preliminary 21(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 2.2.7 Universal Serial Bus ( USB ) UART 2 from the CPU is connected with an Incorporating Clock Generator Output and FTDI Chip-ID™ Security Dongle FT232R ( U601 ) from Future Technology Devices International Ltd.. This is an USB to serial UART interface.
  • Page 22: Can Interfaces

    Preliminary 22(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 2.2.8 CAN Interfaces At the 9-pin SubD female connector X700 are two CAN interfaces CAN0 and CAN1 available. The CAN transceiver SN65HVD234D from Texas Instruments ( U700 and U701 ) provides transmit and receive capability between the differential CAN bus and the JADE with its implemented CAN controllers.
  • Page 23 Preliminary 23(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 120 Ohm termination is configurable per line via switches on board: SW700: 120 Ohm Termination for CAN 0 SW701: 120 Ohm Termination for CAN 1 Following table shows the assignment of pins, signals and function from the CAN connector X700: Signal...
  • Page 24: Video Inputs

    Preliminary 24(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 2.2.9 Video Inputs The Cinch video connectors X480 ( AVIN0 ) and X481 ( AVIN1 ) are connected directly to GDC module interface connector X301 pin 35 and 37 ( Ground pin 33 and 34 ).
  • Page 25: Video Outputs

    Preliminary 25(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 2.2.10 Video Outputs The digital RGB video output 0 from the GDC module has to be connected to X404 by a cable. The digital RGB video output 1 from the GDC module if availablehas to be connected to X405 by a cable.
  • Page 26 Preliminary 26(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 dual edge clocking. In 12-bit mode, the SiI164 supports dual edge single clocking or single edge dual clocking. The SiI164 can be programmed though the I2C interface. The multi-function address inputs A1, A2 and A3 of U400 are strapped to ground by resistors R409, R410 and R412 so the slave address for readings is 0x71 and the slave address for writings is 0x70.
  • Page 27 Preliminary 27(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Signal Function Digital RGB output 1 Data red VO0_R1 Digital RGB output 2 Data red VO0_R2 Digital RGB output 3 Data red VO0_R3 Digital RGB output 4 Data red VO0_R4 Digital RGB output 5 Data red VO0_R5...
  • Page 28 Preliminary 28(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Signal Function Digital RGB output 3 Data blue VO0_B3 Digital RGB output 4 Data blue VO0_B4 Digital RGB output 5 Data blue VO0_B5 Digital RGB output 6 Data blue VO0_B6 Digital RGB output 7 Data blue VO0_B7...
  • Page 29: Buttons

    Preliminary 29(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 2.2.11 Buttons If the button SW100 which is not labeled will be pressed a reset will be generated. If the button SW501 which is labeled with ABORT will be pressed the interrupt 0 ( P24_0 ) will be generated.
  • Page 30: Gpios

    Preliminary 30(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Following table shows the assignment of LEDs and GPIOs. GPIO D500 P25_0 D501 P25_1 D502 P25_2 D503 P25_3 Table 2-9: LED GPIO assignment 2.2.13 GPIOs Some GPIOs from the CPU are available at connected X900 FTSH-110-01-L-DV-K-A-P from Samtec.
  • Page 31 Preliminary 31(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Following table shows the assignment of pins, signals and function from the connector X900: Signal Function VCC33 + 3.3 V GPIO0 P14_0 GPIO1 P14_1 GPIO2 P16_4 GPIO3...
  • Page 32: Secure Digital ( Sd ) Memory Card Interface

    Preliminary 32(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 2.2.14 Secure Digital ( SD ) Memory Card Interface At SD memory card connector X901 the signals of the SD memory card from the CPU are connected.
  • Page 33: Hardware Variants

    Preliminary 33(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Hardware Variants Up to now only PCB version PA3 without variants is available.
  • Page 34: Placement Of Components

    Preliminary 34(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Placement of Components...
  • Page 35 Preliminary 35(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01...
  • Page 36: Mechanical Dimensions

    Preliminary 36(36) Prepared Document Number Manfred Ortmann Approved Checked Date Revision Storage 2008-05-14 PA 3.5 Mycable01 Mechanical Dimensions The 467 / GDC board has a size of 160.0 x 100.0 mm.