Process Data Architecture - WAGO I/O System 750 Manual

WAGO I/O System 750
750-8210/040-000 PFC200; G2; 4ETH; XTR
15.3

Process Data Architecture

The process image for the I/O modules on the local bus is built up word-by-word
in the controller (with word alignment). The internal mapping method for data
greater than one byte conforms to Intel formats.
The following section describes the representation for WAGO I/O System 750
XTR I/O modules in the process image, as well as the configuration of the
process values.
Equipment damage due to incorrect address!
To prevent any damage to the device in the field you must always take the
process data for all previous byte or bit-oriented I/O modules into account when
addressing an I/O module at any position in the fieldbus node.
No direct access from fieldbus to the process image for I/O modules!
Any data that is required from the I/O module process image must be explicitly
mapped in the CODESYS program to the data in the fieldbus process image and
vice versa! Direct access is not possible!
Version 1.7.0, valid from FW Version 04.01.10(23)
Appendix 241
Manual