Altera Arria V GX FPGA Manuals

Altera Arria V GX FPGA Manuals

Manuals and User Guides for Altera Arria V GX FPGA. We have 2 Altera Arria V GX FPGA manuals available for free PDF download: Reference Manual, User Manual

Altera Arria V GX FPGA User Manual

Altera Arria V GX FPGA User Manual (60 pages)

Brand: Altera | Category: Microcontrollers | Size: 2.19 MB

Table of Contents

Table of Contents
3
Chapter 1. About this Kit

7
- Kit Features
  7
  - Hardware
    7
  - Software
    7
    
    Quartus II Software
    7
    
    Arria V GX FPGA Development Kit Installer
    8
Chapter 2. Getting Started

9
- Before You Begin
  9
  - Inspect the Boards
    9
- References
  10
Chapter 3. Software Installation

11
Chapter 4. Development Board Setup

15
- Setting up the Board
  15
- Factory Default Switch and Jumper Settings
  16
Chapter 5. Board Update Portal

21
- Connecting to the Board Update Portal Web Page
  21
- Using the Board Update Portal to Update User Designs
  22
Chapter 6. Board Test System

23
- Preparing the Board
  24
- Running the Board Test System
  25
- Using the Board Test System
  25
  - The Configure Menu
    25
  - The System Info Tab
    26
    
    Board Information
    26
    
    MAX II Registers
    26
    
    JTAG Chain
    27
    
    Qsys Memory Map
    28
  - The GPIO Dev 1 Tab
    28
    
    Character LCD
    28
    
    User DIP Switch
    29
    
    User Leds
    29
    
    Push Button Switches
    29
  - The Flash Tab
    30
    
    Read
    30
    
    Write
    31
    
    Random Test
    31
    
    CFI Query
    31
    
    Increment Test
    31
    
    Reset
    31
    
    Erase
    31
    
    Flash Memory Map
    31
  - The HSMA Tab
    32
    
    Status
    32
    
    Port
    33
    
    PMA Setting
    33
    
    Data Type
    33
    
    Error Control
    34
    
    Start
    34
    
    Stop
    34
    
    Loopback
    34
  - The SFP/SMA/C2C Tab
    35
    
    Status
    35
    
    Port
    36
    
    PMA Setting
    36
    
    Data Type
    36
    
    Error Control
    37
    
    Start
    37
    
    Stop
    37
    
    Loopback
    37
  - The HSMB/FMC Tab
    38
    
    Status
    38
    
    Port
    39
    
    PMA Setting
    39
    
    Data Type
    39
    
    Error Control
    40
    
    Start
    40
    
    Stop
    40
    
    Loopback
    40
  - The Sdi/Bullseye Tab
    41
    
    Status
    41
    
    Port
    42
    
    PMA Setting
    42
    
    Data Type
    42
    
    Error Control
    43
    
    Start
    43
    
    Stop
    43
    
    Loopback
    43
  - The SMA Tab
    44
    
    Status
    44
    
    Port
    45
    
    PMA Setting
    45
    
    Data Type
    45
    
    Error Control
    46
    
    Start
    46
    
    Stop
    46
    
    Loopback
    46
- The Power Monitor
  46
  - General Information
    47
  - Power Information
    48
  - Power Graph
    48
  - Graph Settings
    48
  - Reset
    48
  - Calculating Power
    48
- The Clock Control
  49
  - Registers
    50
  - Frequency (Mhz)
    50
  - Disable
    50
  - Default
    50
  - Set New Frequency
    50
- Configuring the FPGA Using the Quartus II Programmer
  50
- Samtec High-Speed Bull's Eye Connector
  51
Appendix A.programming the Flash Memory Device

53
Additional Information

59
- Document Revision History
  59
- How to Contact Altera
  59
- Typographic Conventions
  59

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Altera Arria V GX FPGA Reference Manual

Altera Arria V GX FPGA Reference Manual (90 pages)

Brand: Altera | Category: Motherboard | Size: 2.05 MB

Table of Contents

Table of Contents
3
Chapter 1. Overview

5
- General Description
  5
- Board Component Blocks
  6
- Dual FPGA
  7
- Fpga 1
  7
- Fpga 2
  8
- Development Board Block Diagram
  9
- Handling the Board
  9
- Introduction
  11
- Board Overview
  12
- Featured Device: Arria V GX FPGA
  16
- I/O Resources
  17
- MAX II CPLD EPM2210 System Controller
  19
- Configuration, Status, and Setup Elements
  25
- Configuration
  25
- FPGA Programming over On-Board USB-Blaster II
  25
- FPGA Programming from Flash Memory
  27
- FPGA Programming over External USB-Blaster
  29
- Status Elements
  29
- Setup Elements
  31
- Board Settings DIP Switch
  31
- JTAG Settings DIP Switch
  32
- PCI Express Control DIP Switch
  32
- CPU Reset Push Button
  33
- MAX II Reset Push Button
  33
- Configuration Push Button
  34
- Image Select Push Button
  34
- Clock Circuitry
  34
- On-Board Oscillators
  34
- Off-Board Clock Input/Output
  37
- General User Input/Output
  39
- User-Defined Push Buttons
  39
- User-Defined DIP Switches
  40
- User-Defined Leds
  41
- General User-Defined Leds
  41
- HSMC User-Defined Leds
  42
- Lcd
  43
- SDI Video Output/Input
  44
- Components and Interfaces
  47
- PCI Express
  47
- 10/100/1000 Ethernet
  50
- Hsmc
  52
- SFP+ Module
  59
- FMC Connector
  60
- Bull's Eye Connector
  67
- Memory
  68
- Ddr3
  68
- DDR3A for FPGA 1
  68
- DDR3B/C for FPGA 2
  73
- Qdrii
  78
- Flash
  81
- Power Supply
  83
- Power Distribution System
  83
- Power Measurement
  85
- Statement of China-Rohs Compliance
  87
- Additional Information
  89
- Document Revision History
  89
- How to Contact Altera
  89
- Typographic Conventions
  89

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