Example Schematic For Clock Ratio Pin Sharing - Intel Pentium II Developer's Manual

ELECTRICAL SPECIFICATIONS
buffer specifications. The multiplexer output current should be limited to 200 mA maximum,
in case the Vcc supply to the processor ever fails.
CORE
As shown in Figure 7-4, the pull-up resistors between the multiplexer and the processor
(1 KΩ) force a ratio of 1/2 into the processor in the event that the Pentium II processor
powers up before the multiplexer and/or the core logic. This prevents the processor from ever
seeing a ratio higher than the final ratio.
1KΩ
A20M#
IGNNE#
LINT1/NMI
LINT0/INTR
Set Ratio:
CRESET#
Figure 7-4. Example Schematic for Clock Ratio Pin Sharing
If the multiplexer were powered by Vcc
of the four pull-up resistors between the multiplexer and the Pentium II processor. In this
case, the multiplexer must be designed such that the compatibility inputs are truly ignored, as
their state is unknown.
The compatibility inputs to the multiplexer must meet the input specifications of the
multiplexer. This may require a level translation before the multiplexer inputs unless the
inputs and the signals driving them are already compatible.
For FRC mode operation, the multiplexer will need to be clocked using BCLK to meet setup
and hold times to the processors. This may require the use of high speed programmable logic.
7-8
2.5 V
Mux
, a pull-down could be used on CRESET# instead
2.5
2.5 V
Pentium II
®
Processors
000918