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This chapter describes configuration options for P6 family processor agents.
A system may contain one or two Pentium II processors. Processors can also be used in FRC
configurations, with two physical processors in a logical FRC unit. Both processors are
connected to one Pentium II processor system bus.
5.1.
DESCRIPTION
Pentium II processors have some configuration options which are determined by hardware,
and some which are determined by software.
Pentium II processor system bus agents sample their hardware configuration at reset, on the
active-to-inactive transition of RESET#. The configuration signals (except IGNNE#, A20M#
and LINT[1:0]) must be asserted 4 clocks before the active-to-inactive transition of RESET#
and be deasserted two clocks after the active-to-inactive transition of RESET# (see
Figure 5-1). The IGNNE#, A20M#, and LINT[1:0] signals must meet a setup time of 1 ms to
the active-to-inactive transition of RESET#.
The sampled information configures the processor and other bus agents for subsequent
operation. These configuration options cannot be changed except by another reset. All resets
reconfigure the Pentium II processor system bus agents; the bus agents do not distinguish
between a "warm" reset and a "power-on" reset.
CLK
RESET#
{Configuration
Pins}
Figure 5-1. Hardware Configuration Signal Sampling
Pentium II processor system bus agents can also be configured with some additional software
configuration options. These options can be changed by writing to a power-on configuration
register which all bus agents must implement. These options should be changed only after
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CHAPTER 5
CONFIGURATION
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5-1
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