Settling Limit Guideline - Intel Pentium II Developer's Manual

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Table 9-3. Signal Ringback Specifications for Non-GTL+ Signals
Input Signal Group
Non-GTL+ Signals
Non-GTL+ Signals
9.3.3.

Settling Limit Guideline

Settling limit defines the maximum amount of ringing at the receiving pin that a signal must
reach before its next transition. The amount allowed is 10 percent of the total signal swing
(V
–V
) above and below its final value. A signal should be within the settling limits of its
HI
LO
final value, when either in its high state or low state, before it transitions again.
Signals that are not within their settling limit before transitioning are at risk of unwanted
oscillations which could jeopardize signal integrity. Simulations to verify settling limit may
be done either with or without the input protection diodes present. Violation of the settling
limit guideline is acceptable if simulations of 5 to 10 successive transitions do not show the
amplitude of the ringing increasing in the subsequent transitions.
Maximum Ringback
Transition
(with Input Diodes Present)
0 → 1
1 → 0
SIGNAL QUALITY SPECIFICATIONS
2.0 V
0.7 V
Figure
9-2
9-2
9-5

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