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GTL+ INTERFACE SPECIFICATIONS
Symbol
Maximum Signal
Overshoot
Maximum Signal
Undershoot
Settling Limit
Maximum Signal Ringback
(Nominal)
The overshoot/undershoot guidelines are provided to limit signals transitioning beyond V
or V
due to fast signal edge rates. Violating the overshoot/undershoot guideline is
SS
acceptable, but since excessive ringback is the harmful effect associated with
overshoot/undershoot it will make satisfying the ringback specification very difficult.
Violations of the Settling Limit guideline are acceptable if simulations of 5 to 10 successive
transitions do not show the amplitude of the ringing increasing in the subsequent transitions.
If a signal has not settled close to its final value before the next logic transition, then the
timing delay to V
of the succeeding transition may vary slightly due to the stored reactive
REF
energy in the net inherited from the previous transition. This is akin to 'eye' patterns in
communication systems caused by inter-symbol interference. The resulting effect is a slight
variation in flight time.
8-4
Table 8-2. Specifications for Signal Quality
Parameter
Maximum Absolute voltage for the Pentium
processor edge finger
Maximum Absolute voltage a signal extends below
V SS (simulated without protection diodes).
The maximum amount of ringing, at the receiving
processor pin, a signal must be limited to before its
next transition. This signal should be within 10% of the
signal swing to its final value, when either in its high
state or low state.
The maximum amount of ringing allowed for a signal at
a receiving processor pin within the receiving chips
setup and hold time window before the next clock.
This value is dependent upon the specific receiver
design. (Ringing within the setup and hold windows
must not come within 250mV of V
edge fingers, although specific devices may allow
more ringing and loosen this specification. See Section
8.1.2.1. for more details.
®
II
±10% of (V OH -V OL )
(guideline)
V REF ±250 mV
at the processor
REF
Specification
2.5V
-0.7V
CC
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